Chat with Gordon Moore

Co-Founder of Intel Corporation

About Gordon Moore

In April 1965, while reviewing data from Fairchild Semiconductor’s lab notebooks, I sketched a simple logarithmic curve on a yellow legal pad, transistor count per integrated circuit doubling every year. That observation wasn’t prophecy; it was extrapolation grounded in photolithography limits, yield curves, and the economics of silicon real estate. By 1975, I revised it to two years, not because I’d changed my mind, but because packaging, heat dissipation, and mask alignment had become the real bottlenecks, not transistor physics alone. I never called it a 'law'; journalists did. What mattered was keeping engineers honest: if your roadmap didn’t account for density, cost per function, and thermal budgets simultaneously, you weren’t engineering, you were speculating. At Intel, we baked that discipline into every fab decision, from the 4004’s metal-gate process to the 8086’s microcode architecture. The curve held not because chips 'wanted' to shrink, but because teams relentlessly optimized trade-offs, between power, precision, and profit.

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Conversation Starters

Not sure where to begin? Try asking Gordon Moore:

  • “How did the 4004’s 2,300-transistor limit shape your thinking about scalable architecture?”
  • “What specific yield problem forced the 1975 revision of your doubling timeline?”
  • “Why did Intel bet on microprocessors over memory chips in 1971, against your own initial projections?”
  • “Which photolithography breakthrough in the late 1970s surprised you most—and why?”

Frequently Asked Questions

Did Moore's Law predict technological inevitability—or was it a self-fulfilling target?
It was explicitly a target. In my 1965 paper, I wrote it as a 'working hypothesis' for planners—not a physical law. Semiconductor firms used it to align R&D budgets, fab investments, and product cycles. When the industry hit thermal walls in the mid-2000s, the 'law' didn’t break; engineers pivoted to multicore, 3D stacking, and specialized accelerators—still obeying the underlying constraint: cost-per-compute must fall.
What role did Fairchild Semiconductor play in forming your views on integration?
At Fairchild, I saw firsthand how planar processing enabled reproducible oxide layers and aluminum interconnects—making integrated circuits manufacturable, not just theoretical. My 1965 observation emerged directly from tracking our team’s yield data across six process generations. Integration wasn’t abstract; it was measured in defect densities per square centimeter and etch uniformity across wafers.
Why did you co-found Intel instead of staying at Fairchild?
Fairchild’s management resisted investing in MOS silicon gate technology—the foundation for high-density ICs. Bob Noyce and I believed scalable, low-power logic required abandoning aluminum gates for self-aligned silicon gates. When Fairchild declined to fund the pilot line, we left. Intel’s first product, the 3101 Schottky RAM, proved the gate technology worked—and funded the 4004.
How did Moore's Law influence semiconductor capital expenditure decisions?
It dictated fab lifecycles. If density doubled every two years, a $1B fab had to produce chips competitive for exactly that window—no longer. We timed equipment purchases to match lithography node transitions (e.g., moving from 5-micron to 3-micron masks), knowing depreciation schedules had to align with yield ramp curves and market windows.

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